Physical Design Engineer II

We are seeking a skilled Physical Design Engineer II specializing in Silicon Engineering. The ideal candidate will be responsible for performing partition synthesis and physical implementation, optimizing design methodologies, and collaborating closely with ASIC design teams.

Key Responsibilities

• Perform partition synthesis and physical implementation (synthesis, floorplanning, place-and-route, timing, noise).
• Develop and optimize physical design methodologies and automation scripts.
• Collaborate with ASIC design to set timing, power, and area targets and trade-offs.
• Resolve design/timing/congestion issues and drive signoff.
• Run and fix signoff issues in STA, noise, physical verification, EM, and voltage drop.

Requirements & Qualifications

• Bachelor’s degree in Electrical, Computer Engineering, or Computer Science.
• 3+ years of RTL to GDSII physical design or flow development experience.
• Experience with industry-standard EDA tools.
• Knowledge of FinFET and CMOS physics.
• Understanding of CMOS digital design and standard cells.
• Familiarity with DFT/Scan/MBIST/LBIST concepts and their impact on physical design.
• Scripting skills in Bash, Perl, Python, and TCL.