RFIC Layout Designer (RFIC Engineering)

Determine chip floor plan and power/ground distribution Estimate layout schedule and identify complexity early Layout RF/analog blocks with matching and minimized parasitics Run DRC, ERC and LVS checks; fix errors Integrate top-level layout with ESD structures and pads Collaborate with EDA vendors to trial new tools Bachelor's degree in electrical or computer engineering; or 3+ yrs IC layout exp in lieu of degree 1+ year professional IC layout experience Strong analog layout skills Advanced nodes experience: 22nm/16nm/7nm/5nm RF layout experience (LNA, VCO, mixers) Proficiency in Python/Perl/shell scripting and Linux Stock options and long-term incentives Medical, vision, dental coverage 401(k) retirement plan Paid vacation and holidays Sick leave and parental leave Employee discounts and perks